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 DTC114EXV3T1 Series Digital Transistors (BRT)
NPN Silicon Surface Mount Transistors with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single device and its external resistor bias network. The digital transistor contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base-emitter resistor. The digital transistor eliminates these individual components by integrating them into a single device. The use of a digital transistor can reduce both system cost and board space. The device is housed in the SC-89 package which is designed for low power surface mount applications.
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NPN SILICON DIGITAL TRANSISTORS
* * * * *
Simplifies Circuit Design Reduces Board Space Reduces Component Count Available in 8 mm, 7 inch/3000 Unit Tape & Reel Lead-Free Solder Plating (Pure Sn)
PIN 1 BASE (INPUT)
PIN 3 COLLECTOR (OUTPUT) R1 R2 PIN 2 EMITTER (GROUND)
MAXIMUM RATINGS (TA = 25C unless otherwise noted)
Rating Collector-Base Voltage Collector-Emitter Voltage Collector Current Symbol VCBO VCEO IC Value 50 50 100 Unit Vdc Vdc mAdc 1 3
2
SC-89 CASE 463C STYLE 1
MARKING DIAGRAM
3 xx D 1 2
xx = Specific Device Code (See Marking Table on page 2) D = Date Code
(c) Semiconductor Components Industries, LLC, 2004
1
January, 2004 - Rev. 0
Publication Order Number: DTC114EXV3T1/D
DTC114EXV3T1 Series
DEVICE MARKING AND RESISTOR VALUES
Device DTC114EXV3T1 DTC124EXV3T1 DTC144EXV3T1 DTC114YXV3T1 DTC114TXV3T1 DTC143TXV3T1 Marking 8A 8B 8C 8D 94 8F R1 (K) 10 22 47 10 10 4.7 R2 (K) 10 22 47 47 Shipping 3000/Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
THERMAL CHARACTERISTICS
Characteristic Total Device Dissipation, FR-4 Board (Note 1) @ TA = 25C Derate above 25C Thermal Resistance, Junction-to-Ambient (Note 1) Total Device Dissipation, FR-4 Board (Note 2) @ TA = 25C Derate above 25C Thermal Resistance, Junction-to-Ambient (Note 2) Junction and Storage Temperature Range 1. FR-4 @ Minimum Pad. 2. FR-4 @ 1.0 x 1.0 Inch Pad. Symbol PD 200 1.6 RJA PD 300 2.4 RJA TJ, Tstg 400 -55 to +150 mW mW/C C/W C 600 mW mW/C C/W Max Unit
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DTC114EXV3T1 Series
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Collector-Base Cutoff Current (VCB = 50 V, IE = 0) Collector-Emitter Cutoff Current (VCE = 50 V, IB = 0) Emitter-Base Cutoff Current (VEB = 6.0 V, IC = 0) DTC114EXV3T1 DTC124EXV3T1 DTC144EXV3T1 DTC114YXV3T1 DTC114TXV3T1 DTC143TXV3T1 ICBO ICEO IEBO - - - - - - - - 50 50 - - - - - - - - - - 100 500 0.5 0.2 0.1 0.2 0.9 1.9 - - nAdc nAdc mAdc
Collector-Base Breakdown Voltage (IC = 10 A, IE = 0) Collector-Emitter Breakdown Voltage (Note 3) (IC = 2.0 mA, IB = 0)
V(BR)CBO V(BR)CEO
Vdc Vdc
ON CHARACTERISTICS (Note 3)
DC Current Gain (VCE = 10 V, IC = 5.0 mA) DTC114EXV3T1 DTC124EXV3T1 DTC144EXV3T1 DTC114YXV3T1 DTC114TXV3T1 DTC143TXV3T1 hFE 35 60 80 80 160 160 - 60 100 140 140 350 350 - - - - - - - 0.25 Vdc Vdc - - - - - - VOH 4.9 - - - - - - - 0.2 0.2 0.2 0.2 0.2 0.2 - Vdc
Collector-Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA) (IC = 10 mA, IB = 1.0 mA) DTC143TXV3T1/DTC114TXV3T1 Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 k) DTC114EXV3T1 DTC124EXV3T1 DTC114YXV3T1 DTC114TXV3T1 DTC143TXV3T1 DTC144EXV3T1
VCE(sat) VOL
(VCC = 5.0 V, VB = 3.5 V, RL = 1.0 k)
Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 k) (VCC = 5.0 V, VB = 0.25 V, RL = 1.0 k) DTC143TXV3T1 DTC114TXV3T1 Input Resistor DTC114EXV3T1 DTC124EXV3T1 DTC144EXV3T1 DTC114YXV3T1 DTC114TXV3T1 DTC143TXV3T1 DTC114EXV3T1/DTC124EXV3T1/ DTC144EXV3T1 DTC114YXV3T1 DTC143TXV3T1/DTC114TXV3T1
R1
7.0 15.4 32.9 7.0 7.0 3.3 0.8 0.17 -
10 22 47 10 10 4.7 1.0 0.21 -
13 28.6 61.1 13 13 6.1 1.2 0.25 -
k
Resistor Ratio
R1/R2
3. Pulse Test: Pulse Width < 300 s, Duty Cycle < 2.0%.
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DTC114EXV3T1 Series
250 PD , POWER DISSIPATION (MILLIWATTS) 200
150 100 50 0 -50
RJA = 600C/W
0 50 100 TA, AMBIENT TEMPERATURE (C)
150
Figure 1. Derating Curve
r(t), NORMALIZED TRANSIENT THERMAL RESISTANCE
1.0
D = 0.5 0.2 0.1 0.05 0.02
0.1
0.01
0.01 SINGLE PULSE
0.001
0.00001
0.0001
0.001
0.01
0.1 t, TIME (s)
1.0
10
100
1000
Figure 2. Normalized Thermal Response
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DTC114EXV3T1 Series
TYPICAL ELECTRICAL CHARACTERISTICS - DTC114EXV3T1
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 1 IC/IB = 10 TA = -25C 25C 0.1 75C 1000 hFE , DC CURRENT GAIN (NORMALIZED) VCE = 10 V TA = 75C 25C -25C 100
0.01
0.001
0
20 40 IC, COLLECTOR CURRENT (mA)
50
10
1
10 IC, COLLECTOR CURRENT (mA)
100
Figure 3. VCE(sat) versus IC
Figure 4. DC Current Gain
4 f = 1 MHz IE = 0 V TA = 25C
100 75C IC, COLLECTOR CURRENT (mA) 10 1 0.1
25C TA = -25C
Cob , CAPACITANCE (pF)
3
2
1
0.01 VO = 5 V 0 1 2 3 4 5 6 7 Vin, INPUT VOLTAGE (VOLTS) 8 9 10
0
0
10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS)
50
0.001
Figure 5. Output Capacitance
Figure 6. Output Current versus Input Voltage
10 VO = 0.2 V V in , INPUT VOLTAGE (VOLTS) TA = -25C 25C 75C 1
0.1
0
10
20 30 IC, COLLECTOR CURRENT (mA)
40
50
Figure 7. Input Voltage versus Output Current
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DTC114EXV3T1 Series
TYPICAL ELECTRICAL CHARACTERISTICS - DTC124EXV3T1
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 1 IC/IB = 10 TA = -25C 25C 75C 1000 hFE, DC CURRENT GAIN (NORMALIZED)
VCE = 10 V TA = 75C 25C -25C
0.1
100
0.01
0.001
0
20 IC, COLLECTOR CURRENT (mA)
40
50
10
1
10 IC, COLLECTOR CURRENT (mA)
100
Figure 8. VCE(sat) versus IC
Figure 9. DC Current Gain
4 f = 1 MHz IE = 0 V TA = 25C
100 IC, COLLECTOR CURRENT (mA) 10 1 0.1 0.01
75C
25C TA = -25C
Cob , CAPACITANCE (pF)
3
2
1
VO = 5 V 0 0 10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS) 50 0.001 0 2 4 6 Vin, INPUT VOLTAGE (VOLTS) 8 10
Figure 10. Output Capacitance
Figure 11. Output Current versus Input Voltage
100 VO = 0.2 V V in , INPUT VOLTAGE (VOLTS) TA = -25C 10 75C 25C
1
0.1
0
10
20
30
40
50
IC, COLLECTOR CURRENT (mA)
Figure 12. Input Voltage versus Output Current
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DTC114EXV3T1 Series
TYPICAL ELECTRICAL CHARACTERISTICS - DTC144EXV3T1
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 10 IC/IB = 10 1000 hFE , DC CURRENT GAIN (NORMALIZED)
VCE = 10 V TA = 75C 25C -25C
1 TA = -25C 0.1 25C 75C
100
0.01
0
20 40 IC, COLLECTOR CURRENT (mA)
50
10
1
10 IC, COLLECTOR CURRENT (mA)
100
Figure 13. VCE(sat) versus IC
Figure 14. DC Current Gain
1 0.8 Cob , CAPACITANCE (pF) 0.6 0.4 0.2 0
IC, COLLECTOR CURRENT (mA)
f = 1 MHz IE = 0 V TA = 25C
100 75C 10 1 0.1
25C TA = -25C
0.01 VO = 5 V 0 2 4 6 Vin, INPUT VOLTAGE (VOLTS) 8 10
0
10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS)
50
0.001
Figure 15. Output Capacitance
Figure 16. Output Current versus Input Voltage
100 VO = 0.2 V V in , INPUT VOLTAGE (VOLTS) TA = -25C 10 25C 75C
1
0.1
0
10
20
30
40
50
IC, COLLECTOR CURRENT (mA)
Figure 17. Input Voltage versus Output Current
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DTC114EXV3T1 Series
TYPICAL ELECTRICAL CHARACTERISTICS - DTC114YXV3T1
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 1 IC/IB = 10 TA = -25C 25C 75C hFE, DC CURRENT GAIN (NORMALIZED) 300 250 200 150 100 50 0 1 2 4 6 8 10 15 20 40 50 60 70 80 IC, COLLECTOR CURRENT (mA) 90 100 VCE = 10 TA = 75C 25C -25C
0.1
0.01
0.001
0
20 40 60 IC, COLLECTOR CURRENT (mA)
80
Figure 18. VCE(sat) versus IC
Figure 19. DC Current Gain
4 3.5 Cob , CAPACITANCE (pF) 3 2.5 2 1.5 1 0.5 0 0 2 4 6 8 10 15 20 25 30 35 VR, REVERSE BIAS VOLTAGE (VOLTS) 40 45 50 f = 1 MHz lE = 0 V TA = 25C
100 TA = 75C IC, COLLECTOR CURRENT (mA) 25C
-25C 10
VO = 5 V 1 0 2 4 6 Vin, INPUT VOLTAGE (VOLTS) 8 10
Figure 20. Output Capacitance
Figure 21. Output Current versus Input Voltage
10 VO = 0.2 V V in , INPUT VOLTAGE (VOLTS) TA = -25C 25C 75C
1
0.1
0
10
20 30 IC, COLLECTOR CURRENT (mA)
40
50
Figure 22. Input Voltage versus Output Current
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DTC114EXV3T1 Series
TYPICAL APPLICATIONS FOR NPN BRTs
+12 V
ISOLATED LOAD
FROM P OR OTHER LOGIC
Figure 23. Level Shifter: Connects 12 or 24 Volt Circuits to Logic
+12 V
VCC
OUT IN LOAD
Figure 24. Open Collector Inverter: Inverts the Input Signal
Figure 25. Inexpensive, Unregulated Current Source
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DTC114EXV3T1 Series
PACKAGE DIMENSIONS
SC-89 CASE 463C-03 ISSUE C
A -X-
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. 463C-01 OBSOLETE, NEW STANDARD 463C-02. MILLIMETERS MIN NOM MAX 1.50 1.60 1.70 0.75 0.85 0.95 0.60 0.70 0.80 0.23 0.28 0.33 0.50 BSC 0.53 REF 0.10 0.15 0.20 0.30 0.40 0.50 1.10 REF --- --- 10 _ --- --- 10 _ 1.50 1.60 1.70 INCHES NOM MAX 0.063 0.067 0.034 0.040 0.028 0.031 0.011 0.013 0.020 BSC 0.021 REF 0.004 0.006 0.008 0.012 0.016 0.020 0.043 REF --- --- 10 _ --- --- 10 _ 0.059 0.063 0.067
3 1 2
B -Y- S
K G
2 PL DIM A B C D G H J K L M N S
D 0.08 (0.003)
M
3 PL
XY
MIN 0.059 0.030 0.024 0.009
M C
N J -T-
SEATING PLANE
STYLE 1: PIN 1. BASE 2. EMITTER 3. COLLECTOR
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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DTC114EXV3T1/D


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